# Simulation of Digital ICs

Key points:

- The electrical properties of a part are determined by its logic family parameters.
- The voltage level of a loaded output is given by: V out = V unloaded ± I R, where I is the current load, R is the output slope (see logic family parameters) and the sign of the second term depends on the direction of current flow.
- Integrated circuit parts with memory are simulated with the following synchronous behaviour; the outputs are set according to the values the inputs had at the previous simulation time step.
- As a result of the one-time step delay, asynchronous behaviour of real devices (for inputs not synced to a clock pulse) may not be simulated fully.
- Logic gate parts without memory do not follow the one-time step delay rule. They behave correctly in an analogue manner.

## See also:

- Logic family parts